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Emulation for Logic Validation
Emulation for Logic Validation also referred to as virtual commissioning. This process involves replicating the behavior of one or more pieces of hardware with a software environment (typically for a system under design). The goal of the emulation engineer is to create an environment that mimics the real automation hardware. The ultimate goal of emulation is to provide an environment for the manufacturing automation controls engineer to validate their PLC (Programmable Logic Controller) ladder logic and HMI (Human-Machine Interface) files prior to system debug in the plant environment therefore improving quality and enabling a seamless transition from the virtual to physical environment. Another benefit is to deliver plant maintenance operators and machine conductors with realistic virtual environments for training themselves in safe and optimum conditions.
== Introduction ==
Unlike discrete event simulation, emulation for logic validation is not necessarily concerned with process centric timing.
抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』
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